Assessment 2 Data Representation DIgital Logic

Home Assignment Answers Assessment 2 Data Representation DIgital Logic

Question 1: -

Answer

  1. 0x2ED1 to Binary

The converted value is obtained by mapping is given a hexadecimal number with binary representation. Binary Representation for each number is given below: -

2 – 0010

E - 1110

D - 1101

1 – 0001

Combining from top to bottom, final converted value is 0010111011010001.

  1. −29.6610 to Binary

Division Method is used for conversion. First -29 is converted into binary form (Remainder Value).

For 29

Divisor

Dividend Value

Remainder Value

2

29

 

2

14

1

2

7

0

2

3

1

2

1

1

2

0

1

 

 

 

By combining remainder value from bottom to up i.e. 11101 is converted the form of 29.

Conversion of .66 is shown below: -

Given Number/Calculated Number

Multiplied with

Sum

Remainder Value

0.66

2

1.32

1

0.32

2

0.64

0

0.64

2

1.28

1

0.28

2

0.56        

0

0.56

2

1.12

1

0.12

2

0.24

0

0.24

2

0.48

0

0.48

2

0.96

0

0.96

2

1.92

1

0.92

2

1.84

1

0.84

2

1.68

1

0.68

2

1.36

1

0.36

2

0.72

0

0.72

2

1.44

1

0.44

2

0.88

0

0.88

2

1.76

1

0.76

2

1.52

1

0.52

2

1.04

1

 

For 0.66, we have obtained value (combining from top-to-down) 101010001111010111 for 0.66.

By combining both results, the final converted value is 11101. 101010001111010111

 

 

  1. c) 1001111001102 to Hexadecimal

Given bit are formed into a group of 4 i.e. 1001, 1110 and 0110. There is hexadecimal representation for each group of 4 bits as 9, E and 6. Hence, Hexadecimal representation is 0x9EX.

 

  1. d) 11101110 (8-bit 2’s complement representation) to decimal

 

  • The number starts with 1, hence it is a negative
  • 1’s complement of a number is done by changing 1 to 0 or 0 to 1 as shown below.

 

 

1

1

1

0

1

1

1

0

[Given Number]

¬

0

0

0

1

0

0

0

1

[1’s Complement]

+

             

1

[Add 1]

 

0

0

0

1

0

0

1

0

[Answer] in binary form

 

  • Final conversion is performed by multiplying obtained bits with 2x where x is location of bit i.e. 7 to 0 (starting from left hand side to right hand side).

= 0 x 27 + 0 x 26 + 0 x 25 + 1 x 24 + 0 x 23 + 0 x 22 + 1 x 21 + 0 x 20

= 0 + 0 + 0 + 16 + 0 + 0 + 2 + 0

= - 18 [Number is negative because it starts with 1]

  1. e) 1 01111110 11000000000000000000000

Step 1: - The expression will be split into 3 groups as follows:

1          01111110         11000000000000000000000

I                 I                         I

Sign     exponent          fraction

Step 2: - The sign bit is 1, therefore it is a negative number.

Step 3: - To get value of exponent, exponent bits 01111110 will be converted to decimal = 0 X 27 + 1 X 26 +1 X 25 + 1 X 25 +1 X 23 +1 X 22 + 1 X 21 + 0 X 20 = 126

Step 4: - We will subtract from exponent 126 the value of bias which is 127 for single precision number, so power of 2 is -1.

Step 5: - Converting fraction bits into decimal, we get 1 X 2-1 + 1 X 2-2 = 0.75

-1.75 x 2 -1 = -0.875

-8.75000000… X 10-1 (Answer)

 Keywords: Universal gates, Logic gates , Boolean functions

Question 2: -

  1. a) Universal gates are those gates which can be used by users in order to create any combinational circuit. There are universal gates named as NAND and NOR Gate.

Using NAND Gate, Invertor Design is

 

Invertor is a NOT gate in which 1 input is changed to 0 and 0 input is changed to output.

  1. b)

Given Components: -

Quiz                 --          Q

Assignment      --          A

Journal             --          J

Course pass (Output) is denoted with letter “P”.

To pass the course, there should be 1 in at least 2 or more components.

Values Observed in truth Table: -

Q

A

J

P

0

0

0

0

0

0

1

0

0

1

0

0

0

1

1

1

1

0

0

0

1

0

1

1

1

1

0

1

1

0

1

1

 

Circuit Designed: -

From Truth Table, following Circuit is formed: - 

To get reduced form, we are using Karnaugh map.

Output = P.

Sum of product format is used to extract minimized form: -

 

A, J

 

 

00

01

11

10

Q

0

0

0

1

0

1

0

1

1

1

 

Final Equation: - AJ + QJ + QA.

Reduced Form Calculation: -

=AJ + QJ + QA

=J(A + Q) + QA [Reduced Solution]

 

Question 3

Truth Table Calculated from Circuit is shown below: -

X

Y

Z

F

0

0

0

0

0

0

1

0

0

1

0

1

0

1

1

1

1

0

0

1

1

0

1

1

1

1

0

0

1

1

1

0

For minimizing equation, K-map theorem is used: -

 

Y, Z

 

Input à

00

01

11

10

X

0

0

0

1

1

1

1

1

0

0

 

F =  [Minimized Equation]

 

 

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