8086 Microprocessor: History and Architecture

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In June 1978, Intel launched the first 16-bit microprocessor: 8086. In June 1979, 8088 appeared (internally the same as 8086 but with an 8-bit data bus) and in 1980 the co-processors 8087 (mathematical) and 8089 (input and output). The first manufacturer that developed software and hardware for these chips was Intel itself. Recognizing the need to support these integrated circuits, the company invested a significant amount of money in a large and modern building in Santa Clara, California, dedicated to the design, manufacture and sale of its development systems, which, as explained above, are self-sufficient computers with the necessary hardware and software to develop microprocessor software.

Development systems are key factors to ensure the sales of a chip manufacturing company. The vast majority of sales are to other companies, which use these chips in electronic devices, designed, manufactured and marketed by themselves. These companies are called "original equipment manufacturers", or in English, OEM (Original Equipment Manufacturer). Reducing hardware and software development time for OEMs is essential since the market for these products is very competitive. They need support because the months that the development of the appropriate tools can take them can mean losses of millions of dollars. They also want to be the first manufacturers in the market, which can ensure sales in two important areas: short-term,

In this way, the company Intel had developed a complete series of software that was run on a microcomputer based on the 8085 called "Intellect Microcomputer Development System". The programs included cross assemblers (these are programs that run on one microprocessor and generate machine code that runs on another), PL / M compilers, Fortran and Pascal and several help programs. In addition, there was a translator program called WITH V86 that converted source code 8080/8085 to source code 8086/8088. If both sets of instructions are observed closely, it is clear that the transformation is simple if the registers are translated as follows: A -> AL, B -> CH, C -> CL, D -> DH, E -> DL, H -> BH and L -> BL. It may seem complicated to translate LDAX B (for example) since the 8088 cannot use the CX register for indirect addressing, however, it can be done with the following sequence: MOV SI, CX; MOV AL. This takes advantage of the fact that the SI register is not used. Of course, the resulting program is longer (in some bytes) and sometimes slower than running in its predecessor 8085. This conversion program only served not to have to rewrite the programs in a first stage. Then you should rewrite the source code in assembler to get the speed advantages offered by the 8088. Then you had to run the program on the iSBC 86/12 Single Board Computer based on the 8086. Due to the hassle of having two different platelets, the company Godbout Electronics (also of California) developed a plate where they were the 8085 and the 8088, where a crossed assembler provided by the company Microsoft was used. Under software control, the microprocessors could be switched. The operating system used was CP / M (from Digital Research). The most notable development for the 8086/8088 family was the choice of the 8088 CPU by IBM (International Business Machines) when in 1981 it entered the field of personal computers.

This computer was developed under a project with the name "Acorn" (Project "Bellota"), but it was sold under a less imaginative name, but more correct: "IBM Personal Computer". It is done with an initial price between 1260 dollars and 3830 dollars according to the configuration (with 48KB of RAM and a disk unit with a capacity of 160KB cost $ 2235). This computer came into direct competition with those offered by Apple (based on the 6502) and by Radio Shack (based on the Z-80).


The 8086 is a 16-bit microprocessor, both in terms of its structure and its external connections, while the 8088 is an 8-bit processor that is almost identical internally to 8086. The only difference between the two is the size of the external data bus. Intel treats this internal equality and external inequality by dividing every 8086 and 8088 processors into two sub-processors. That is, each consists of an execution unit (EU: Execution Unit) and a bus interface unit (BIU: Bus Interface Unit). The execution unit is responsible for performing all operations while the bus interface unit is responsible for accessing data and instructions from the outside world. The execution units are identical in both microprocessors, but the bus interface units are different in several issues,

'Architecture of microprocessors'

The advantage of this division was the effort-saving needed to produce the 8088. Only one half of the 8086 (the BIU) had to be redesigned to create the 8088. The explanation of the block diagram is as follows:


They have 16 bits each, and they are eight:

AX = Accumulator register, divided into AH and AL (8 bits each). Using it occurs (in general) an instruction that occupies one byte less than if other records of general use were used. Its lower part, AL, also has this property. The last record mentioned is the equivalent to the accumulator of the previous processors (8080 and 8085). In addition, there are instructions like DAA; YOU GIVE; AAA; AAS; AAM; AAD; LAHF; SAHF; CBW; IN and OUT that work with AX or with one of its two bytes (AH or AL). This record (along with DX sometimes) is also used in multiplications and divisions.
BX = Base register, divided into BH and BL. It is the base register of similar purpose (it is used for indirect addressing) and is a more powerful version of the pair of HL registers of the previous processors.
CX = Counter register, divided into CH and CL. It is used as a counter in loops (LOOP instruction), in operations with strings (using the prefix REP) and in displacements and rotations (using the CL register in the last two cases).
DX = Data record, divided into DH and DL. It is used together with the AX register in multiplications and divisions, in the CWD instruction and IN and OUT for auxiliary port addressing (the DX register indicates the input/output port number).
SP = Battery pointer (cannot be subdivided). Although it is a general use register, it should only be used as a stack pointer, which is used to store the return addresses of subroutines and temporary data (using the PUSH and POP instructions). When you enter (push) value in the stack, this record is subtracted two, while to extract (pop) an amount of the stack this record is added two.
BP = Base pointer (cannot be subdivided). It is usually used to perform indirect addressing inside the stack.
SI = Index pointer (cannot be subdivided). It serves as a source pointer for string operations. It also serves to perform indirect addressing.
DI = Target Pointer (cannot be subdivided). It serves as a destination pointer for operations with chains. It also helps to perform indirect addressing. Any of these registers can be used as a source or destination in arithmetic and logical services, which cannot be done with any of the six registers that will be seen later.


It is in charge of carrying out the arithmetic operations (sum, sum with "drag", subtraction, subtraction with "loan" and comparisons) and logic (AND, OR, XOR and TEST). The operations can be 16 bits or 8 bits.


There are nine one-bit flags in this 16-bit register. The four most significant bits are undefined, while there are three bits with specific values: bits 5 and three are always zero and bit 1 is always one (this also happened in the previous processors).


It is responsible for decoding the instructions sent by the queue and sending the orders to the arithmetic and logical unit according to a table that is stored in ROM called CROM (Control Read Only Memory).


It stores the instructions to be executed. The queue is loaded when the bus is unoccupied, in this way higher efficiency is achieved. The queue of the 8086 has 6 bytes and is loaded two bytes at a time (due to the size of the data bus), while that of the 8088 has four bytes. This structure has optimal performance when no jumps are made since in this case; the queue would have to be emptied (because the instructions that go after the jump will not be executed) and to reload it with instructions that are from the address where it jumps. Because of this, the jump instructions are (after multiplications and divisions) the slowest of this microprocessor.

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